Photogate V2
High-precision optical timer based on ESP32
View IBOM
Overview
Photogate V2 brings improved accuracy, reliability, and a clean interface for educational physics experiments on the ESP32 platform. The project is open hardware and uses a fully open-source toolchain for CAD and firmware.
Characteristics
High Precision
Uses the ESP32’s internal high-resolution timer/counter with a FreeRTOS-based design for deterministic, accurate measurements.
FreeRTOS Firmware
Task-based architecture improves responsiveness and timing isolation (ISR → queue → measurement task).
KiCad (PCB)
PCB layout and schematics created with the open-source KiCad suite.
FreeCAD (3D)
Parametric enclosure modeled with FreeCAD for easy editing and printing.
Open Hardware
All design files are published for study, modification, and reuse.
Easy to Print
The case parts are easy to 3D print — no supports needed.
Interactive BOM
Interactive 3D Preview
Build and Run
Requirements
- ESP-IDF v5.4.2
- A configured ESP32 development environment (terminal toolchain)
- Required cables and hardware to flash the firmware
Quick Start
1) Clone the repository
git clone https://github.com/MarcioBulla/PhotogateV2.git
cd PhotogateV2
2) Set up the ESP-IDF environment
Follow the official guide: Get Started with ESP-IDF
3) Build, flash, and monitor
cd firmware
idf.py build flash monitor
Repository Structure
- firmware/C source code for ESP32 firmware
- boards/PCB layouts or circuit schematics
- 3DModels/Printable or viewable 3D models of the device
- README.mdProject documentation